How Photomasks for IC Production Are Made

How Photomasks for IC Production Are Made

What you will learn

1. The full photomask flow, from design data to shipment.

2. Who makes masks and mask blanks.

3. How many masks a state-of-the-art IC needs.

4. What a full mask set costs and why.

What is a photomask

A photomask, also called a reticle, carries your chip pattern so a scanner can print it on wafers. Deep ultraviolet masks use a quartz plate with a chromium absorber. EUV masks use a reflective stack made of alternating molybdenum and silicon layers with a tantalum-based absorber on top. EUV blanks typically have 40 to 50 MoSi pairs and a protective cap layer. Two companies dominate blank supply, Hoya and AGC. Veeco ion-beam tools are widely used to deposit those multilayers. 

Step by step process

1. Tapeout and data prep
You freeze your layout and run resolution enhancement. This includes optical proximity correction, mask rules checks, and fracturing into shapes the writer accepts. The goal is tight pattern fidelity and writeability.

2. Start with a blank
For DUV, the blank is quartz with a chrome absorber. For EUV, the blank is a mirror with 40 to 50 MoSi layers, a ruthenium cap, and a tantalum-based absorber. Blanks come from Hoya and AGC.

3. Clean and coat
The mask blank is cleaned in a filtered line. A thin electron-beam resist is spin-coated. Thickness and defects are tracked with inline metrology.

4. Write the pattern
Writers expose the resist with electrons. Advanced masks use multi-beam writers to speed write time and improve critical dimension uniformity. Leaders include NuFlare and IMS multi-beam systems. SPIE reports that a 10 nm pixel multi-beam pass spans over 100 terapixels of data on a 132 mm by 104 mm field.

5. Develop and etch
The resist is developed. For DUV, the tool etches the chromium absorber. For EUV, the process etches the tantalum-based absorber while protecting the mirror. A final resist strip follows.

6. Inspect and measure
Blank inspection screens incoming blanks. Pattern inspection checks defects and placement. Aerial-image tools emulate the scanner to judge printability. EUV adds actinic inspection at EUV wavelength. Vendors include KLA for reticle inspection and projection, Zeiss for AIMS systems, and Lasertec for actinic EUV inspection.

7. Repair
E-beam or focused ion systems repair clear and opaque defects where possible. Then you re-inspect the repaired sites and re-qualify critical metrics.

8. Mount pellicle and final QA
A pellicle is a thin protective film that holds particles away from the mask surface. DUV masks ship with pellicles. EUV pellicles are thinner and more complex and come from ASML and Mitsui Chemicals. The shop verifies registration, critical dimensions, flatness, and defect maps. The mask then ships with a full certificate.

Who makes photomasks and blanks

Merchant photomask makers serve most fabless and many foundry programs.
• Photronics operates a global network and positions itself as a leading pure-play photomask manufacturer. 
• Tekscend Photomask, formerly Toppan Photomask, runs eight manufacturing sites worldwide.
• Dai Nippon Printing develops EUV masks for 3 nm, 2 nm, and beyond.

EUV mask blanks, the mirror substrates, come mainly from Hoya and AGC. How many masks a state-of-the-art IC needs Mask count depends on node, device class, and options such as power rails and metal stack. At 28 nm, a complex SoC needed about 46 masks. At 10 nm, that grew to about 76. EUV reduced some multi-patterning, yet total counts at 5 nm and 3 nm still run in the 70 to 100 range for complex designs. TSMC has used up to about 14 EUV layers at 5 nm, and over 20 EUV layers for early 3 nm variants. SPIE notes mask counts can drop by about 35 percent with EUV on sub-2 nm flows, but today’s advanced SoCs still require many layers. 

What a full mask set costs

Mask non-recurring engineering is a major line item in budgets. Costs vary by node, layer count, reticle type, defect targets, and who is the supplier.

Here are some examples of costs:
• 14 nm mask set around 3 million dollars.
• 7 nm mask set more than 5 million dollars, with estimates up to 7 to 8 million dollars as of the early EUV era.
• Leading-edge AI chips report mask costs in the 20 million dollars plus range.
• Analysts project 3 nm mask sets in the tens of millions, with some estimates near 30 to 40 million dollars depending on options.

Why costs run so high

1. Materials. EUV blanks have dozens of precision multilayers with tight defect specs, and limited suppliers.

2. Tools. Multi-beam writers, actinic inspectors, and AIMS tools are complex and expensive. Data volume is huge, which drives tool time. 

3. Yield targets. One defect can print across an entire wafer lot. Shops invest in inspection, repair, and requalification to protect your yield.

4. Layer count. Every extra layer brings another mask, write, inspect, and QA cycle. EUV reduces cuts and vias but total mask counts at advanced nodes remain high. 

Key takeaway

Photomasks are precision products that tie design, materials, and metrology into one flow. It starts with heavy data prep, write on a high-end e-beam system, etch the absorber, inspect and repair, then ship with pellicle and a certificate. Merchant leaders include Photronics, Tekscend Photomask, and Dai Nippon Printing. EUV blanks come from Hoya and AGC. A modern System on a Chip (SoC) needs on the order of dozens to near one hundred masks. A full set runs from several million dollars at 7 nm to tens of millions at 3 nm, driven by materials, tools, and layer count.

Silicon Masters is the number one supplier of high quality photomasks as a desk display in the world. We offer a number of different masks with unique patterns. we ship the masks with a costume backlit desk display in a custom 3d printed shipping box. Click here to see what is currently available or contact us at info@siliconmasters.co for more info.  

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